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Samsung announces the first 12nm-class DDR5 DRAM


Samsung Electronics today announced the development of the industry’s first DDR5 RAM based on the 12nm-class process technology. The company today confirmed that the compatibility evaluation with AMD on its ‘Zen’ products have also been completed.
12nm-class DDR5 RAM uses advanced material
The significant advancement in technology has been achieved through the introduction of a high-κ material that increases the capacitance of cells and a proprietary design technique that enhances important circuit features. This, combined with advanced multi-layer extreme ultraviolet lithography, has resulted in the creation of DRAM with the highest die density in the industry, leading to a 20% increase in wafer productivity.
Samsung’s 12nm-class DRAM, utilises the latest DDR5 standard, and has the potential to reach speeds of up to 7.2 gigabits per second, allowing for the quick processing of two 30-gigabyte UHD movies in just one second.
Samsung’s DRAM offers improved speed and efficiency
The new DRAM improves speed, while offering improved power efficiency, consuming up to 23% less power than its predecessor. This makes it a particularly suitable choice for IT companies looking to operate more sustainably.
Samsung plans to begin mass producing this advanced 12nm-class DRAM in 2023 and expand its availability into various market segments. The company is collaborating with industry partners to support the growth of next-generation computing.
“Our 12nm-range DRAM will be a key enabler in driving market-wide adoption of DDR5 DRAM,” said Jooyoung Lee, Executive Vice President of DRAM Product & Technology at Samsung Electronics. “With exceptional performance and power efficiency, we expect our new DRAM to serve as the foundation for more sustainable operations in areas such as next-generation computing, data centers and AI-driven systems.”
“Innovation often requires close collaboration with industry partners to push the bounds of technology,” said Joe Macri, Senior VP, Corporate Fellow, and Client, Compute, and Graphics CTO at AMD.





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